The Meeting
Topic 16: GPU and Accelerators Computing
Description
GPU, FPGA, Cell and other computing chips are advanced parallel architectures which can strongly accelerate computation of highly demanding application. Indeed, scientific applications of various scientific areas are leaning towards these novel architectures. However, programming to efficiently use such accelerators is a very hard challenge resulting from their inherent parallelism and their specific architecture. Moreover, to get best performance it is necessary to conjointly use regular CPUs or several accelerator simultaneously.
The goal of this topic is to provide a forum for exchanging new ideas and progress in the domain of accelerator-based computing. We encourage submissions in all areas related to accelerators: architecture, languages, compilers, libraries, runtime, debugging and profiling tools, algorithms, applications, etc.
Focus
- New accelerator architectures
- Language, Compilers, and Runtime environments for accelerator programming
- Programing clusters of accelerators
- Tools for debugging, profiling, and optimizing programs on accelerator
- Hybrid applications using several accelerator and/or CPUs
- Parallel algorithms for accelerators
- Models and benchmarks for accelerators
- Manual optimization and auto-tuning
- Library support for accelerators
Topic Committee
Global chair
Wolfgang Karl, University of Karlsruhe, Germany
Local chair
Samuel Thibault, University of Bordeaux, France
Vice-chairs
Stan Tomov, University of Tennessee, USATaisuke Boku, University of Tsukuba, Japan